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Analog Design Engineer
• Conduct end-to-end design and development of advanced CMOS Image Sensor (CIS) technologies with a focus on transistor-level design, simulation, and verification of analog circuits using Cadence Virtuoso. • Design…
Analog Design Engineer
Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, comparator, ramp…
Digital Design Engineer
A cover letter outlining your motivation to move to Oslo, Norway is required with submittal of your CV. We design and verify: timing and control signals for CMOS pixel array readout & analog/digital converters;…
Analog Design Engineer
We are looking for qualified Analog design engineers who have a good understanding of analog circuit and CMOS Image Sensor. Candidates should have the capability to design and develop analog circuit independently, as…
Digital Design Engineer: Senior Engineer / Engineer
Responsibilities: As Digital Design Engineer, • Responsible for RTL design and verification using Verilog and System Verilog • Define System Architecture and/or Block level Micro Architecture based on product features…
Design Verification Manager
As a Design Verification Manager, you are expected to carry out the following responsibilities. Be in-charge of a passionate verification team that is constantly pushing the limits Develop and deploy state-of-the-art…
(Staff/Sr. Staff) NPU Design Engineer
Responsibilities: Develop design requirements for an NPU based on system level specifications. Being part of modelling the performance of the NPU module and its data transaction throughput. Microarchitecture design and…
(Sr./Staff) Software Engineer, Edge AI - Toolchain
We are looking for Senior/Staff Software Engineers to grow our Edge AI & Systems software team to the next level. This team works within the larger ASIC team to architect and enhance Neural Network solutions in the…
(Sr.) ISP RTL Design Manager
Responsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements,…
(Sr./Staff) Design Verification Engineer
Description: As a design verification engineer, you will be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in…
(Sr./Staff) ISP RTL Design Engineer
Responsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements,…
(Sr./Staff) SoC Design Engineer
Description: You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing engines, neural processing units, advanced video analytics accelerators, and the entire Camera…
Digital Design engineer: Senior staff engineer / Staff engineer
Responsibilities: Responsible for RTL design and verification using Verilog and System Verilog Define System Architecture and/or Block level Micro Architecture based on product features and performance requirements,…