SiFive
Software Engineer - FPGA-Accelerated RTL Simulation
Build the C++ application that drives SiFive's custom FPGA-based hardware emulation framework for RISC-V core IP. You'll work alongside FPGA RTL designers and compiler developers using modern C++20, multithreading, Chisel, and MLIR/CIRCT.
Senior Full Stack Engineer
Senior full-stack engineer at SiFive developing a Visual Studio Code plugin (SiFive Core Designer) that consumes a REST API for RISC-V chip IP design, with a Python/Django back end and JavaScript/TypeScript front end.
Technical Program Manager
Technical Program Manager at SiFive driving RISC-V processor core IP development programs from engineering scoping through product release. Coordinates cross-functional chip design teams using Agile methodology and tools like JIRA, Git/GitHub, and Confluence.
Senior DevOps & Backend Engineer
Senior engineer owning AWS EKS infrastructure, Terraform IaC, and CI/CD pipelines (GitHub Actions, Concourse, Jenkins) while building backend services in Python and Django. Core stack: Kubernetes, Docker, Helm, PostgreSQL/RDS, and AWS services (SQS, S3, Lambda).
Design Verification Engineer to Staff Engineer (Unit Level Test)
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Principal Design Verification Engineer – CPU Coherent Interconnect
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
System Software Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Interconnect Design Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Power Management Design Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Power Management Design Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Power Management Design Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Interconnect Design Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Full-Stack Staff Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Staff RTL Design Engineer
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Core Performance Architect
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Core Performance Architect
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Core Performance Architect
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Senior Staff RTL Design Engineer - CPU Frontend
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Staff Design Verification Engineer – High Performance CPU Core
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Staff Design Verification Engineer – High Performance CPU Core
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…