Staff Principal Logical Design Engineer
You will produce micro-architecture specifications and RTL for AI compute chips as part of the logical design function. You will contribute to design infrastructure and flows, use EDA tools, perform block-level and chip-level checks, solve design issues through programming, and collaborate with physical design, verification, and DFT engineers.
Responsibilities
- Produce micro-architecture specifications and RTL for chips
- Maintain communication between teams and sites
- Contribute to shared design infrastructure and flows
- Use EDA tools and design flows
- Perform block-level and chip-level linting, synthesis, timing closure, CDC, RDC, and coverage checks
- Collaborate with physical design, verification, and DFT teams
Requirements
- Degree in Computer Science, Engineering, or a related subject
- Digital design experience in a relevant industry
- Strong competency in SystemVerilog or VHDL
- Knowledge of digital design flows
- Ability to solve design issues using Python or Tcl
- Knowledge of processor design
- Knowledge of application-specific blocks
- Knowledge of high-speed serial interfaces
- Experience with complex third-party IP integration
- Knowledge of arithmetic pipeline design
- Knowledge of floating-point design
- Knowledge of design for test
- Knowledge of synthesis, timing analysis, and logical equivalence
Benefits
- Flexible working
- Annual leave
- Private medical insurance
- Health cash plan
- Dental plan
- Pension with employer matching up to 5%
- Life assurance
- Income protection
- Parental leave
- Employee Assistance Programme
- Healthy food and snacks