Technical Manager, IC Physical Design

Job Description

  • IC physical design of 6nm/4nm/3nm and below world leading advanced process chip, from RTL to GDS.
  • Block coordinator role for Synthesis/APR/PV tasks of more than 10 blocks, solving the critical issue and give the solution to block owners.
  • TOP role for the complicated hierarchical chip (more than 20 million instances plus 1000+ macros), doing floorplan, partition and assembly etc.
  • PD PM role to coordinate with Frontend and Signoff team about on time delivery of the SoC PD tasks, responsible for full chip PD schedule and tapeout.

Requirements

  • Strong knowledge of IC design, leader role with tapeout experience is a must
  • With a minimum of 8 years of experience
  • Strong knowledge of UNIX/LINUX env and capable of at least one of the following programming language: C/C++, Python, TCL, Perl
  • Excellent communication and teamwork spirit, could coordinate with different teams to conquer all gating items, drive team to finish the assigned task on time with quality


Interested candidates may apply through the application system. We regret to inform only Shortlisted candidates will be notified.

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PERSOL Singapore Pte Ltd • RCB No. 200007268E • EA License No. 01C4394 • EA Registration No. R1877971 (Derrick Tiew Yong Han)

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